In a semiconductor device having a semiconductor switching device, an increase in channel density is effective to allow a larger current to flow. In a silicon transistor, a MOSFET with a trench gate structure is employed so as to increase the channel density, and such a silicon transistor has been put into practice. Although the trench gate structure can be employed to an SiC semiconductor device, the SiC has a breakdown electric field intensity of ten times as high as that of silicon. Therefore, the SiC semiconductor device is used in a state of being applied with a voltage approximately ten times as high as that of a silicon device. As such, when the trench gate structure is adapted to the SiC semiconductor device, a gate insulation film formed in a trench is applied with an electric field an intensity of which is ten times as high as that of the silicon device. As a result, the gate insulation film is easily broken at corner portions of the trench.
To solve such an issue, a patent literature 1 has proposed a structure of forming a p type layer at a part lower than a bottom portion (bottom surface) of the trench of the trench gate structure by ion-implantation of a p type impurity. Since such a p type layer is formed, electric field concentration is alleviated at the bottom portion of the trench, and the breakage of the gate insulation film can be reduced.
In the structure described in the patent literature 1, however, the p type layer is widely formed in the entirety of the bottom portion of the trench. The p type layer becomes in a floating state. Therefore, switching characteristics are likely to deteriorate.
Therefore, a patent literature 2 has proposed to form a low concentration p type layer also at both of ends of a trench with respect to a longitudinal direction of the trench, in a structure of having the p type layer at a bottom portion of the trench and having a gate insulation film a thickness of which is increased at the bottom portion of the trench by increasing the depth of the trench. Specifically, the low concentration p type layer is formed by performing diagonal ion-implantation to both of the ends of the trench with respect to the longitudinal direction of the trench. In this case, a p type base region and the p type layer at the bottom portion of the trench are connected to each other through the low concentration p type layer at the ends of the trench to restrict the p type layer from being in the floating state. Therefore, the deterioration of the switching characteristics, when the switching element is turned on, can be reduced. Further, when the switching element is turned off, the low concentration p type layer at the ends of the trench is completely depleted, and the p type layer at the bottom portion of the trench is in the floating state. Therefore, an n− type drift layer can be divided into an upper portion and a lower portion. As such, a pseudo PNPN structure is made by the p type base region, the portions of the depletion layer divided up and down on the periphery of the p type layer of the drift layer, and the depletion layer, thereby to achieve high withstand voltage. In this way, the high withstand voltage, low on-state resistance, and high switching speed are achieved.